From 24e99dcce1d8803dea979c4a75682b278dccd7cf Mon Sep 17 00:00:00 2001 From: Oszkar Semerath Date: Wed, 15 Apr 2020 01:12:59 +0200 Subject: Alloy type mapping fix --- .../dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Solvers/Alloy-Solver/hu.bme.mit.inf.dlsreasoner.alloy.reasoner/src/hu/bme/mit/inf/dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend') diff --git a/Solvers/Alloy-Solver/hu.bme.mit.inf.dlsreasoner.alloy.reasoner/src/hu/bme/mit/inf/dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend b/Solvers/Alloy-Solver/hu.bme.mit.inf.dlsreasoner.alloy.reasoner/src/hu/bme/mit/inf/dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend index 107aa001..bbee35fc 100644 --- a/Solvers/Alloy-Solver/hu.bme.mit.inf.dlsreasoner.alloy.reasoner/src/hu/bme/mit/inf/dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend +++ b/Solvers/Alloy-Solver/hu.bme.mit.inf.dlsreasoner.alloy.reasoner/src/hu/bme/mit/inf/dlsreasoner/alloy/reasoner/builder/AlloyModelInterpretation.xtend @@ -117,7 +117,7 @@ class AlloyModelInterpretation implements LogicModelInterpretation{ for(atom: allAtoms) { val typeName = getName(atom.type) val atomName = atom.name - println(atom.toString + " < - " + typeName) + //println(atom.toString + " < - " + typeName) if(typeName == forwardTrace.logicLanguage.name) { this.logicLanguage = atom } else if(typeName == "Int" || typeName == "seq/Int") { -- cgit v1.2.3-70-g09d2