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author | 2019-06-01 17:23:22 -0400 | |
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committer | 2019-06-01 17:23:22 -0400 | |
commit | c6affe2ae0c3ff5540781383907192c45f1f213b (patch) | |
tree | 5b886365e285905ecdf6828242b282d95786e959 | |
parent | Fix for symmetric activation codes on symmetric models (diff) | |
download | VIATRA-Generator-c6affe2ae0c3ff5540781383907192c45f1f213b.tar.gz VIATRA-Generator-c6affe2ae0c3ff5540781383907192c45f1f213b.tar.zst VIATRA-Generator-c6affe2ae0c3ff5540781383907192c45f1f213b.zip |
Inverse references works if opposite reference is pruned away.
-rw-r--r-- | Framework/hu.bme.mit.inf.dslreasoner.ecore2logic/src/hu/bme/mit/inf/dslreasoner/ecore2logic/EReferenceMapper.xtend | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Framework/hu.bme.mit.inf.dslreasoner.ecore2logic/src/hu/bme/mit/inf/dslreasoner/ecore2logic/EReferenceMapper.xtend b/Framework/hu.bme.mit.inf.dslreasoner.ecore2logic/src/hu/bme/mit/inf/dslreasoner/ecore2logic/EReferenceMapper.xtend index 179690dd..50f088d4 100644 --- a/Framework/hu.bme.mit.inf.dslreasoner.ecore2logic/src/hu/bme/mit/inf/dslreasoner/ecore2logic/EReferenceMapper.xtend +++ b/Framework/hu.bme.mit.inf.dslreasoner.ecore2logic/src/hu/bme/mit/inf/dslreasoner/ecore2logic/EReferenceMapper.xtend | |||
@@ -32,7 +32,7 @@ class EReferenceMapper_RelationsOverTypes implements EReferenceMapper{ | |||
32 | val extension Ecore2logicannotationsFactory builder2 = Ecore2logicannotationsFactory.eINSTANCE | 32 | val extension Ecore2logicannotationsFactory builder2 = Ecore2logicannotationsFactory.eINSTANCE |
33 | val extension EClassMapper classMapper; | 33 | val extension EClassMapper classMapper; |
34 | 34 | ||
35 | public new(EClassMapper classMapper) { | 35 | new(EClassMapper classMapper) { |
36 | this.classMapper = classMapper | 36 | this.classMapper = classMapper |
37 | } | 37 | } |
38 | 38 | ||
@@ -117,7 +117,7 @@ class EReferenceMapper_RelationsOverTypes implements EReferenceMapper{ | |||
117 | def createInverseReferenceConstraints(Ecore2Logic_Trace trace, LogicProblem problem, Iterable<EReference> references) { | 117 | def createInverseReferenceConstraints(Ecore2Logic_Trace trace, LogicProblem problem, Iterable<EReference> references) { |
118 | trace.referenceMapperTrace.asTrace.inverseEdges = new HashMap | 118 | trace.referenceMapperTrace.asTrace.inverseEdges = new HashMap |
119 | for(reference : references) { | 119 | for(reference : references) { |
120 | if(reference.EOpposite!=null) { | 120 | if(reference.EOpposite!==null && references.exists[it === reference.EOpposite]) { |
121 | val opposite = reference.EOpposite | 121 | val opposite = reference.EOpposite |
122 | if(trace.referenceMapperTrace.asTrace.inverseEdges.containsKey(opposite)) { | 122 | if(trace.referenceMapperTrace.asTrace.inverseEdges.containsKey(opposite)) { |
123 | trace.referenceMapperTrace.asTrace.inverseEdges.put(reference,trace.referenceMapperTrace.asTrace.inverseEdges.get(opposite)) | 123 | trace.referenceMapperTrace.asTrace.inverseEdges.put(reference,trace.referenceMapperTrace.asTrace.inverseEdges.get(opposite)) |